Semiconductor manufacturers routinely fabricate multilayer semiconductor structures to achieve a high level of integration. The semiconductor structures have multiple devices, such as transistors formed in a substrate. Multiple metallization layers are formed over the substrate to electrically interconnect the devices and form functional circuits. The Metallization layers may also include other devices, such capacitors and resistors.
Alignment marks are used to align the wafer such that subsequent layers are formed at the correct location relative to underlying features. For example, alignment marks are used to form the vias and conductive lines in the metallization layers in the correct location to make electrical contact to the devices, such as transistors, formed in the underlying substrate.